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? semiconductor components industries, llc, 2001 april, 2001 rev. 3 1 publication order number: sg3526/d sg3526 pulse width modulation control circuit the sg3526 is a high performance pulse width modulator integrated circuit intended for fixed frequency switching regulators and other power control applications. functions included in this ic are a temperature compensated voltage reference, sawtooth oscillator, error amplifier, pulse width modulator, pulse metering and steering logic, and two high current totem pole outputs ideally suited for driving the capacitance of power fets at high speeds. additional protective features include soft start and undervoltage lockout, digital current limiting, double pulse inhibit, adjustable dead time and a data latch for single pulse metering. all digital control ports are ttl and bseries cmos compatible. active low logic design allows easy wiredor connections for maximum flexibility. the versatility of this device enables implementation in singleended or pushpull switching regulators that are transformerless or transformer coupled. the sg3526 is specified over a junction temperature range of 0 to +125 c. ? 8.0 v to 35 v operation ? 5.0 v 1% trimmed reference ? 1.0 hz to 400 khz oscillator range ? dual source/sink current outputs: 100 ma ? digital current limiting ? programmable dead time ? undervoltage lockout ? single pulse metering ? programmable softstart ? wide current limit common mode range ? guaranteed 6 unit synchronization figure 1. representative block diagram v ref v cc ground sync r deadtime r t c t reset c soft-start compensation +error -error +c.s. -c.s. shutdown 18 17 15 12 11 9 10 5 4 3 1 2 7 6 8 reference regulator soft start v cc amp under- voltage lockout metering f/f memory f/f toggle f/f s r q q s rq t q q 14 v c 13 output a 16 output b to internal circuitry oscillator - - - + + + 100 mv device package shipping ordering information sg3526n pdip18 20 units/rail http://onsemi.com marking diagram a = assembly location wl = wafer lot yy = year ww = work week 1 18 pdip18 n suffix case 707 1 18 sg3526n awlyyww pin connections (top view) +error compensation c soft-start -cs +cs shutdown -error reset r t r deadtime sync output a ground output b v cc v ref v c c t 1 2 3 4 5 6 7 8 12 13 14 15 16 17 18 9 11 10
sg3526 http://onsemi.com 2 maximum ratings (note 1.) rating symbol value unit supply voltage v cc +40 vdc collector supply voltage v c +40 vdc logic inputs 0.3 to +5.5 v analog inputs 0.3 to v cc v output current, source or sink i o 200 ma reference load current (v cc = 40 v, note 2.) i ref 50 ma logic sink current 15 ma power dissipation t a = +25 c (note 3.) t c = +25 c (note 4.) p d 1000 3000 mw thermal resistance junctiontoair r q ja 100 c/w thermal resistance junctiontocase r q jc 42 c/w operating junction temperature t j +150 c storage temperature range t stg 65 to +150 c lead temperature (soldering, 10 seconds) t solder 300 c recommended operating conditions characteristics symbol min max unit supply voltage v cc 8.0 35 vdc collector supply voltage v c 4.5 35 vdc output sink/source current (each output) i o 0 100 ma reference load current i ref 0 20 ma oscillator frequency range f osc 0.001 400 khz oscillator timing resistor r t 2.0 150 k w oscillator timing capacitor c t 0.001 20 m f available deadtime range (40 khz) 3.0 50 % operating junction temperature range t j 0 +125 c 1. values beyond which damage may occur. 2. maximum junction temperature must be observed. 3. derate at 10 mw/ c for ambient temperatures above +50 c. 4. derate at 24 mw/ c for case temperatures above +25 c.
sg3526 http://onsemi.com 3 electrical characteristics (v cc = +15 vdc, t j = t low to t high [note 6.], unless otherwise noted.) characteristics symbol min typ max unit reference section (note 7.) reference output voltage (t j = +25 c) v ref 4.90 5.00 5.10 v line regulation (+8.0 v v cc +35 v) reg line 10 30 mv load regulation (0 ma i l 20 ma) reg load 10 50 mv temperature stability d v ref / d t 10 mv total reference output voltage variation (+8.0 v v cc +35 v, 0 ma i l 20 ma) d v ref 4.85 5.00 5.15 v short circuit current (v ref = 0 v) (note 5.) i sc 25 80 125 ma undervoltage lockout reset output voltage (v ref = +3.8 v) 0.2 0.4 v reset output voltage (v ref = +4.8 v) 2.4 4.8 v oscillator section (note 8.) initial accuracy (t j = +25 c) 3.0 8.0 % frequency stability over power supply range (+8.0 v v cc +35 v) d f osc d v cc 0.5 1.0 % frequency stability over temperature ( d t j = t low to t high ) d f osc d t j 2.0 % minimum frequency (r t = 150 k w , c t = 20 m f) f min 0.5 hz maximum frequency (r t = 2.0 k w , c t = 0.001 m f) f max 400 khz sawtooth peak voltage (v cc = +35 v) v osc (p) 3.0 3.5 v sawtooth valley voltage (v cc = +8.0 v) v osc (v) 0.45 0.8 v error amplifier section (note 9.) input offset voltage (r s 2.0 k w ) v io 2.0 10 mv input bias current i ib 350 2000 na input offset current i io 35 200 na dc open loop gain (r l 10 m w ) a vol 60 72 db high output voltage (v pin 1 v pin 2 +150 mv, i source = 100 m a) v oh 3.6 4.2 v low output voltage (v pin 2 v pin 1 +150 mv, i sink = 100 m a) v ol 0.2 0.4 v common mode rejection ratio (r s 2.0 k w ) cmrr 70 94 db power supply rejection ratio (+12 v v cc +18 v) psrr 66 80 db 5. maximum junction temperature must be observed. 6. t low = 0 ct high = +125 c 7. i l = 0 ma unless otherwise noted. 8. f osc = 40 khz (r t = 4.12 k w 1%, c t = 0.01 m f 1%, r d = 0 w ) 9. 0 v v cm +5.2 v.
sg3526 http://onsemi.com 4 electrical characteristics (continued) characteristics symbol min typ max unit pwm comparator section (note 10.) minimum duty cycle (v compensation = +0.4 v) dc min 0 % maximum duty cycle (v compensation = +3.6 v) dc max 45 49 % digital ports (sync , shutdown , reset ) output voltage (high logic level) (i source = 40 m a) (low logic level) (i sink = 3.6 ma) v oh v ol 2.4 4.0 0.2 0.4 v input current ? high logic level (high logic level) (v ih = +2.4 v) (low logic level) (v il = +0.4 v) i ih i il 125 225 200 360 m a current limit comparator section (note 12.) sense voltage (r s 50 w ) v sense 80 100 120 mv input bias current i ib 3.0 10 m a softstart section error clamp voltage (reset = +0.4 v) 0.1 0.4 v c softstart charging current (reset = +2.4 v) i cs 50 100 150 m a output drivers (each output, v c = +15 vdc, unless otherwise noted.) output high level i source = 20 ma i source = 100 ma v oh 12.5 12 13.5 13 v output low level i sink = 20 ma i sink = 100 ma v ol 0.2 1.2 0.3 2.0 v collector leakage, v c = +40 v i c(leak) 50 150 m a rise time (c l = 1000 pf) t r 0.3 0.6 m s fall time (c l = 1000 pf) t f 0.1 0.2 m s supply current (shutdown = +0.4 v, v cc = +35 v, r t = 4.12 k w ) i cc 18 30 ma 10. f osc = 40 khz (r t = 4.12 k w 1%, c t = 0.01 m f 1%, r d = 0 w ) 11. 0 v v cm +5.2 v 12. 0 v v cm +12 v
sg3526 http://onsemi.com 5 figure 2. reference stability over temperature figure 3. reference voltage as a function supply voltage figure 4. error amplifier open loop frequency response figure 5. current limit comparator threshold figure 6. undervoltage lockout characteristic figure 7. output driver saturation voltage as a function of sink current -75 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( c) 50 mv spec limit 1.0 2.0 3.0 4.0 5.0 10 20 30 40 v cc , supply voltage (v) , reference voltage (v) ref v 1 2 3 + _ 10 100 1.0 k 10 k 100 k 1.0 m 10 m 100 pf c comp f, frequency (hz) , voltage gain (db) vol a 25 50 75 100 125 150 175 200 differential input voltage (mv) shutdown voltage (v) 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 v ref , reference voltage (v) reset voltage (v) 2.0 5.0 10 20 50 100 200 output driver sink current (ma) , output driver saturation voltage (v) sat v 5.0 4.0 3.0 2.0 1.0 80 60 40 20 0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 2.5 2.0 1.5 1.0 0.5 0
sg3526 http://onsemi.com 6 r t w , timing resistor (k ) figure 8. v c saturation voltage as a function of sink current figure 9. oscillator period figure 10. error amplifier figure 11. undervoltage lockout figure 12. pulse processing logic the metering flip-flop is an asynchronous data latch which suppresses high frequency oscillations by allowing only one pwm pulse per oscillator cycle. the memory flip-flop prevents double pulsing in a push-pull configuration by remembering which output produced the last pulse. 2.0 5.0 10 20 50 100 200 i c , sink current (ma) , saturation voltage (v) sat v 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 500 1000 oscillator period (ms) r d = 0 w v cc q6 q5 v ref 125 m a q3 q4 50 m a q8 q9 500 1.0k q2 1 + error - error q10 3 compensation q12 q11 q7 50 m a 14 m a q1 1.0k 500 100 m a 14 m a 100 m a 100 m a v ref r1 1.2v bandgap reference r2 + - to reset to driver a to driver b metering f/f s d q q q r s clock pwm pwm sync memory f/f 2.5 2.0 1.5 1.0 0.5 0 200 100 50 20 10 5.0 2.0
sg3526 http://onsemi.com 7 figure 13. extending reference output current capability figure 14. error amplifier connections figure 15. oscillator connections figure 16. foldback current limiting figure 17. softstart circuity figure 18. driving vmos power fets the totem pole output drivers of the sg3526 are ideally suited for driving the input capacitance of power fets at high speeds. reference regulator 17 18 c * 27 v cc gnd v ref + 10 m f * may be required with some types of transistors 15 gnd v ref r 3 r 2 1 2 r 1 positive output voltage gnd v ref r 2 r 3 r 1 1 2 v out = v ref r 1 + - + - negative output voltage v out = v ref r 1 + r 2 r 3 = r 1 r 2 11 r d 910 12 sg3526 r t c t sync + - gnd 8 6 7 - r 1 r 2 r s output to load v out i (max) = r s 0.1 v + v out r 1 + i sc = 0.1 v r s + error amp - - + pwm ramp v ref 100 m a q2 q1 to undervoltage lockout c soft-start q3 1 2 5 + error - error reset +12v 14 13 16 v c a b gnd sg3526 applications information r1 + r2 r2 r 2 r 1 + r 2
sg3526 http://onsemi.com 8 figure 19. halfbridge configuration figure 20. flyback converter with current limiting figure 21. singleended configuration figure 22. pushpull configuration +v supply v c a b sg3526 gnd 15 14 r1 13 16 q2 q1 t2 c2 t1 c1 in the above circuit, current limiting is accomplished by using the current limit comparator output to reset the soft-start capacitor. +v supply r1 c1 15 r2 r3 13 16 7 6 5 8 4 d1 d2 14 c2 r4 t1 q1 v c a b +cs -cs gnd c s s r sg3526 to output filter q1 r1 r2 14 13 16 v c a b sg3526 gnd 15 +v supply +v supply r1 14 15 v c a b sg3526 gnd 13 16 c1 r2 c2 r3 q1 t1 q2
sg3526 http://onsemi.com 9 package dimensions pdip18 n suffix case 70702 issue d notes: 1. positional tolerance of leads (d), shall be within 0.25 mm (0.010) at maximum material condition, in relation to seating plane and each other. 2. dimension l to center of leads when formed parallel. 3. dimension b does not include mold flash. 4. controlling dimension: inch. 1 seating plane 10 9 18 m a b k c n f g d h j l dim min max min max millimeters inches a 22.22 23.24 0.875 0.915 b 6.10 6.60 0.240 0.260 c 3.56 4.57 0.140 0.180 d 0.36 0.56 0.014 0.022 f 1.27 1.78 0.050 0.070 g 2.54 bsc 0.100 bsc h 1.02 1.52 0.040 0.060 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.02 0.020 0.040
sg3526 http://onsemi.com 10 notes
sg3526 http://onsemi.com 11 notes
sg3526 http://onsemi.com 12 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 13036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. sg3526/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland

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